This invention generally pertains to the deposition of amorphous silicon for the formation of interlevel dielectrics in semiconductor memory devices. Generally, in semiconductor memory devices such as EEPROMs and EPROMs, it is desirable to insulate polysilicon layers in these multiple polysilicon layer memory structures. To do this, thermal oxide layers are generally grown between polysilicon layers. Commonly, the thermal oxide layers are grown at extremely high temperatures (1100-1150 degrees centigrade) or the oxidation occurs in an oxygen starved environment. This is done so that the asperity formation is greatly reduced. However, high temperature and oxygen starved (diffusion limited oxidation) degrade the tunnel oxide and interlevel oxide respectively. This in turn compromises the endurance and data retention respectively. Therefore, a method which reduces the interlevel oxidation temperature thereby reducing the degradation of the tunnel oxide without compromise to the interlevel oxide is highly desirable.